1. Field of the Invention
The present invention relates generally to multipliers, and in particular to methods and mechanisms for performing numerous types of multiplication with the same multiplier circuitry.
2. Description of the Related Art
Modern-day processors often need to perform several different types of multiplication (e.g., integer, floating point, vector, polynomial). The multipliers used by processors are typically large, resource intensive circuits. Implementing numerous separate multipliers to perform each type of multiplication can consume a large amount of die space. Die space on a processor is limited in availability and typically there is only so much die space on the processor available for multiplier circuits. The less space taken up by the multipliers, the more space is available for other circuits, and therefore the number and size of the multipliers should be reduced as much as possible.